DocumentCode
3048841
Title
Differential Power Analysis resistance of Camellia and countermeasure strategy on FPGAs
Author
Lu, Y. ; O´Neill, M.P. ; McCanny, J.V.
Author_Institution
Inst. of Electron., Commun. & Inf. Technol., Queen´´s Univ. Belfast, Belfast, UK
fYear
2009
fDate
9-11 Dec. 2009
Firstpage
183
Lastpage
189
Abstract
Security devices are vulnerable to differential power analysis (DPA) that reveals the key by monitoring the power consumption of the circuits. In this paper, we present the first DPA attack against an FPGA implementation of the camellia encryption algorithm with all key sizes and evaluate the DPA resistance of the algorithm. The Camellia cryptographic algorithm involves several different key-dependent intermediate operations including S-Box operations. In previous research, it was believed that the Camellia is stronger than AES due to the additional Whitening phase protecting the S-Box operation. However, we propose an attack that bypasses the Whitening phase and targets the S-Box. In this paper, we also discuss a low-cost countermeasure strategy to protect the Pre-whitening / Post-whitening and FL function of Camellia using Dual-rail Precharged Logic and to protect against attacks of the S-Box using Random Delay Insertion.
Keywords
cryptography; field programmable gate arrays; FL function; FPGA; S-Box operations; camellia encryption algorithm; differential power analysis resistance; dual-rail precharged logic; key-dependent intermediate operations; power consumption; prewhitening post-whitening; random delay insertion; security devices; Algorithm design and analysis; Cryptography; Delay; Energy consumption; Field programmable gate arrays; Hardware; Information analysis; Logic; Protection; Security;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Technology, 2009. FPT 2009. International Conference on
Conference_Location
Sydney, NSW
Print_ISBN
978-1-4244-4375-8
Electronic_ISBN
978-1-4244-4377-2
Type
conf
DOI
10.1109/FPT.2009.5377650
Filename
5377650
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