DocumentCode
3049570
Title
Design of a low-power compressive sampling circuit for Gaussian sensing matrices
Author
Bahmanyar, Parvin ; Hosseini-Khayat, Saied
Author_Institution
Electr. Eng. Dept., Ferdowsi Univ. of Mashhad, Mashhad, Iran
fYear
2013
fDate
14-16 May 2013
Firstpage
1
Lastpage
5
Abstract
The new theory of compressed sensing concerns the acquisition and recovery of sparse signals from their sub-Nyquist sampled data. This paper presents an analog implementation of compressed sensing with Gaussian sensing matrices. The proposed circuit is based on charge redistribution similar to the successive approximation analog-to-digital converters and produces a random sensing matrix with Gaussian entries of 8-bit resolution. This circuit was implemented in 0.18μm CMOS process. Simulation results show that the circuit achieves a percentage root-mean-square difference of 2% or less when the input signal is composed of up to 47 different sine waves all having frequencies less than 25 kHz. The total (simulated) power consumption of the circuit is approximately 12.5μW at 1-volt supply voltage and sampling rate of 50 kS/s.
Keywords
CMOS integrated circuits; analogue integrated circuits; matrix algebra; network synthesis; CMOS process; Gaussian sensing matrices; analog to digital converters; compressed sensing; low power compressive sampling circuit; power consumption; random sensing matrix; root mean square; sampling rate; sparse signals; sub-Nyquist sampled data; supply voltage; Capacitors; Compressed sensing; Equations; Mathematical model; Operational amplifiers; Power demand; Sensors; Compressive sampling; Gaussian sensing matrix; analog integrated circuit; low power consumption;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Engineering (ICEE), 2013 21st Iranian Conference on
Conference_Location
Mashhad
Type
conf
DOI
10.1109/IranianCEE.2013.6599770
Filename
6599770
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