• DocumentCode
    3051528
  • Title

    Exhaustive service matching algorithms for input queued switches

  • Author

    Li, Yihan ; Panwar, Shivendra S. ; Chao, H. Jonathan

  • Author_Institution
    Electr. & Comput. Eng. Dept., Polytech. Univ. Brooklyn, NY, USA
  • fYear
    2004
  • fDate
    2004
  • Firstpage
    253
  • Lastpage
    258
  • Abstract
    Virtual output queuing is widely used by fixed-length high-speed switches to overcome head-of-line blocking. This is done by means of matching algorithms. Maximum matching algorithms have good performance, but their implementation complexity is quite high. Maximal matching algorithms need speedup to guarantee good performance. Iterative matching schemes, such as iSLIP and DRRM, use multiple iterations to converge on a maximal match.. The objective of matching algorithms is to reduce the matching overhead for each time slot. The paper presents exhaustive service matching as a way to amortize the cost of a match over multiple time slots, thus significantly improving switch performance. In an exhaustive service matching switch, cells belonging to the same packet are transferred to the output continuously, which leads to good packet delay performance and simplifies the implementation of packet reassembly. To avoid unfairness under some extremely unbalanced traffic pattern, limited service matching and exhaustive service matching with Hamiltonian walk (EMHW) are presented. We show that limited service matching achieves better fairness under unbalanced traffic patterns, and in some cases improves the delay performance, while retaining low implementation complexity and a scalable architecture. We prove that EMHW is stable under all admissible traffic. All these schemes can be applied to existing matching algorithms, such as iSLIP and DRRM, to achieve high switching efficiency with low implementation complexities.
  • Keywords
    delays; packet switching; queueing theory; telecommunication traffic; Hamiltonian walk; dual round robin matching; exhaustive service matching algorithms; head-of-line blocking; input queued switches; limited service matching; packet delay; unbalanced traffic pattern; virtual output queuing; Delay; Impedance matching; Iterative algorithms; Packet switching; Pattern matching; Round robin; Switches; Telecommunication switching; Throughput; Traffic control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Switching and Routing, 2004. HPSR. 2004 Workshop on
  • Print_ISBN
    0-7803-8375-3
  • Type

    conf

  • DOI
    10.1109/HPSR.2004.1303482
  • Filename
    1303482