DocumentCode
3052802
Title
Interconnect-topology independent mapping algorithm for a Coarse Grained Reconfigurable Architecture
Author
Krishnamoorthy, Ratna ; Fujita, Masahiro ; Varadarajan, Keshavan ; Nandy, S.K.
Author_Institution
Dept. of Electron. Eng., Univ. of Tokyo, Tokyo, Japan
fYear
2011
fDate
12-14 Dec. 2011
Firstpage
1
Lastpage
5
Abstract
Mapping applications onto a Coarse Grained Re-configurable Architecture (CGRA) requires knowledge about the interconnect topology used on the reconfigurable fabric. In order to make communication as efficient as possible, the application sub-structures or partitions need to be mapped to appropriate Compute Elements on the fabric, such that frequently communicating nodes are placed closer. In this paper, we present an interconnect-topology independent mapping algorithm to map applications onto a Coarse Grained Reconfigurable Architecture (CGRA). Our study has been carried out on a CGRA called REDEFINE. The mapping algorithm takes into account the communication serialization which occurs when two data transfers are assigned to the same communication link on the fabric. We extend the algorithm to also address reconfiguration overheads while performing the mapping. The resultant mapping algorithm performs 20% better on average than the mapping scheme based on Baba et al. scheme [1].
Keywords
multiprocessor interconnection networks; network topology; reconfigurable architectures; CGRA; REDEFINE; coarse grained reconfigurable architecture; communication link; communication serialization; compute elements; interconnect-topology independent mapping algorithm; reconfigurable fabric;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Technology (FPT), 2011 International Conference on
Conference_Location
New Delhi
Print_ISBN
978-1-4577-1741-3
Type
conf
DOI
10.1109/FPT.2011.6132677
Filename
6132677
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