Modeling bias temperature instability during stress and recovery

Bias temperature instability has attracted a lot of attention as a dominant degradation mechanism in modern MOS transistors. Despite considerable effort, the exact physics behind this mechanisms are still controversial. We discuss some numerical aspects of our recently presented model which is capable of reproducing the main features of the phenomenon. Furthermore, we demonstrate how the model can be applied to understand variations in nominally identically stressed devices which have become important in the small area limit.