DocumentCode :
3053412
Title :
A novel architecture for a secure update of cryptographic engines on trusted platform module
Author :
Malipatlolla, Sunil ; Feller, Thomas ; Shoufan, Abdulhadi ; Arul, Tolga ; Huss, Sorin A.
Author_Institution :
CASED, Center for Adv. Security Res. Darmstadt, Darmstadt, Germany
fYear :
2011
fDate :
12-14 Dec. 2011
Firstpage :
1
Lastpage :
6
Abstract :
Trusted computing is gaining an increasing acceptance in the industry and finding its way to cloud computing. With this penetration, the question arises whether the concept of hard-wired security modules will cope with the increasing sophistication and security requirements of future IT systems and the ever expanding threats and violations. So far, embedding cryptographic hardware engines into the Trusted Platform Module (TPM) has been regarded as a security feature. However, new developments in cryptanalysis, side-channel analysis, and the emergence of novel powerful computing systems, such as quantum computers, can render this approach useless. Given that, the question arises: Do we have to throw away all TPMs and loose the data protected by them, if someday a cryptographic engine on the TPM becomes insecure? To address this question, we present a novel architecture called Sustainable Trusted Platform Module (STPM), which guarantees a secure update of the TPM cryptographic engines without compromising the system´s trustworthiness. The STPM architecture has been implemented as a proof-of-concept on top of a Xilinx Virtex-5 FPGA platform, demonstrating a test case with an update of the fundamental hash engine of the TPM.
Keywords :
cloud computing; cryptography; field programmable gate arrays; information technology; trusted computing; IT systems; STPM; TPM cryptographic engines; Xilinx Virtex-5 FPGA platform; cloud computing; cryptographic hardware engines; hard-wired security modules; powerful computing systems; quantum computers; security modules; security requirements; side channel analysis; sustainable trusted platform module; trusted computing; Computer architecture; Cryptography; Engines; Field programmable gate arrays; Heuristic algorithms; Nonvolatile memory; Cryptography; Field Programmable Gate Arrays; Secure Update; Trusted Platform Module; Trustworthiness;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field-Programmable Technology (FPT), 2011 International Conference on
Conference_Location :
New Delhi
Print_ISBN :
978-1-4577-1741-3
Type :
conf
DOI :
10.1109/FPT.2011.6132705
Filename :
6132705
Link To Document :
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