DocumentCode
3053435
Title
Reducing power for dynamically reconfigurable processor array by reducing number of reconfigurations
Author
Kimura, Masayuki ; Hironaka, Kazuei ; Amano, Hideharu
Author_Institution
Dept. of Comput. Sci., Keio Univ., Yokohama, Japan
fYear
2011
fDate
12-14 Dec. 2011
Firstpage
1
Lastpage
8
Abstract
A power-consumption-centric assignment algorithm called partially fixed configuration mapping (PFCM) is proposed for multi-context dynamically reconfigurable processors. By assigning the same operations into the same PE (processing element) as many as possible, the amount of changing configuration data for dynamic reconfiguration can be reduced, resulting in the redundant power consumed for changing the configuration also being reduced. The proposed algorithm was implemented in a compiler for a dynamically reconfigurable processor for research. Evaluation results showed that the consumed power was reduced by 10% on average without increasing the execution time.
Keywords
microprocessor chips; power consumption; dynamic reconfiguration; dynamically reconfigurable processor array; multicontext dynamically reconfigurable processors; partially fixed configuration mapping; power-consumption-centric assignment algorithm; processing element;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Technology (FPT), 2011 International Conference on
Conference_Location
New Delhi
Print_ISBN
978-1-4577-1741-3
Type
conf
DOI
10.1109/FPT.2011.6132707
Filename
6132707
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