• DocumentCode
    3053439
  • Title

    A VLSI I/O chip for multiple signal processor architectures

  • Author

    Frey, Alexander H., Jr.

  • Author_Institution
    International Business Machines Corporation Manassas, Virginia
  • Volume
    7
  • fYear
    1982
  • fDate
    30072
  • Firstpage
    1057
  • Lastpage
    1060
  • Abstract
    This paper presents the design features of a Signal Processing Input/Output (SPIO) chip intended for interconnecting a multiplicity of micro signal processors within a cabinet. Interfaces to support both a data transfer network and a control network are described. Examples of several configurations in which the processors could be interconnected to follow an application data flow are given.
  • Keywords
    Application software; Arithmetic; Communication system traffic control; Data handling; Hardware; Registers; Signal design; Signal processing; Testing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '82.
  • Type

    conf

  • DOI
    10.1109/ICASSP.1982.1171585
  • Filename
    1171585