Hardware-accelerated execution of Pi-calculus reconfiguration schedules

The π-calculus is a process algebra originally designed for modelling communicating systems. In this work, it is applied to the design of schedules for partial dynamic reconfiguration, which denote when modules become active and which channels they use for communication. While the execution of the π-calculus in software is possible, a direct execution in hardware is desirable for two reasons: Firstly, direct hardware execution removes the requirement to use a softcore processor. As will be shown in this paper, π-calculus processes only have a tiny hardware footprint. Secondly, the π-calculus is inherently concurrent, and its execution on dedicated hardware can thus be greatly accelerated. This can be used in order to speed up the simulation of schedules. The acceleration of π-calculus simulation may have applications in other fields, since the π-calculus has been used for modelling systems in a wide range of disciplines, for instance in computational biology. The paper shows how π-calculus primitives can be translated into corresponding hardware modules. Since this is difficult to do manually, a tool was created which automatically maps complete processes into synthesizable VHDL code.