• DocumentCode
    3054203
  • Title

    Full-circuit SPICE simulation based validation of dynamic delay estimation

  • Author

    Peng, Ke ; Huang, Yu ; Mallick, Pinki ; Cheng, Wu-Tung ; Tehranipoor, Mohammad

  • Author_Institution
    ECE Dept., Univ. of Connecticut, Storrs, CT, USA
  • fYear
    2010
  • fDate
    24-28 May 2010
  • Firstpage
    101
  • Lastpage
    106
  • Abstract
    Power supply noise may have big impacts on the design performance in the latest technologies. Accurately mapping the IR-drop effect to real delay is a challenging task, which will directly impact the accuracy of IR-drop related performance evaluation, test, and diagnosis. In this paper, we first present our previous work on setting up an IR2Delay database for addressing this issue. We then propose a flow to validate this database by comparing it with full-circuit SPICE simulation results. In this flow, mixed-signal simulation is used, which can reuse the existing digital testbench as stimuli while maintaining the accuracy of SPICE simulation.
  • Keywords
    SPICE; circuit simulation; delay estimation; integrated circuit design; IR-drop effect; IR2Delay database; dynamic delay estimation; full-circuit SPICE simulation; mixed-signal simulation; power supply noise; Circuit simulation; Computational modeling; Crosstalk; Databases; Delay estimation; Performance analysis; Power supplies; SPICE; Testing; Timing; IR-drop; SPICE; delay estimation; mixed-signal simulation; validation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium (ETS), 2010 15th IEEE European
  • Conference_Location
    Praha
  • ISSN
    1530-1877
  • Print_ISBN
    978-1-4244-5834-9
  • Electronic_ISBN
    1530-1877
  • Type

    conf

  • DOI
    10.1109/ETSYM.2010.5512775
  • Filename
    5512775