Title :
Electron trapping at interface states in SiO2/4H-SiC and SiO2/6H-SiC MOS capacitors
Author :
Basile, A.F. ; Rozen, J. ; Chen, X.D. ; Dhar, S. ; Williams, J.R. ; Feldman, L.C. ; Mooney, P.M.
Author_Institution :
Simon Fraser Univ., Burnaby, BC, Canada
Abstract :
The SiO2/SiC interface limits optimum SiC MOSFET performance due to a high density of interface states (D¿¿), which is reduced in devices that receive post-oxidation NO-annealing. Also, the interface state density in the 6H polytype is generally lower, approaching that of the NO treated 4H. In this work, interface states are investigated in both as-oxidized (AO) and NO-annealed (NO) MOS capacitors fabricated from n-type epitaxial (0001) 4Hand 6H-SiC. Oxidation was done in dry O2 at 1150°C followed by 30 min in Ar ambient. The NO exposure was at 1175°C for 2h. Constant capacitance deep level transient spectroscopy (CCDLTS) results are compared with the D¿¿ from hi-lo C-V and temperature dependent C-V measurements.
Keywords :
MOS capacitors; MOSFET; annealing; deep level transient spectroscopy; electron traps; interface states; nitrogen compounds; oxidation; silicon compounds; MOSFET; NO; NO-annealed MOS capacitors; SiO2-SiC:H; constant capacitance deep level transient spectroscopy; electron trapping; interface state density; interface states; n-type epitaxial; post-oxidation NO-annealing; temperature 1150 C; Argon; Capacitance; Capacitance-voltage characteristics; Electron traps; Interface states; MOS capacitors; MOSFET circuits; Oxidation; Silicon carbide; Temperature measurement;
Conference_Titel :
Semiconductor Device Research Symposium, 2009. ISDRS '09. International
Conference_Location :
College Park, MD
Print_ISBN :
978-1-4244-6030-4
Electronic_ISBN :
978-1-4244-6031-1
DOI :
10.1109/ISDRS.2009.5378028
