Title :
Top-Gate Molding Process Development of Cavity Down TBGA for High Density Wire Bonding and Low K Dielectric Wafer Technology Application
Author :
Muniandy, Kesvakumar ; Ruzaini, Ibrahim ; Wei, Shim Kar
Author_Institution :
Freescale Semicond., Selangor
Abstract :
Top-gate molding systems have been commercially available for mass production for more than 5 years. Key attractions to this relatively new molding concept are its improvement in wire sweep performance for ultra fine pitch wire bonding and ability to capitalize desirable mold compound mechanical properties over liquid encapsulation material for low k dielectric wafer technology application. This paper covers the development effort of top-gate molding in Freescale Semiconductor to replace liquid encapsulation process for cavity down TBGA package. Besides the ultra fine pitch and multi-tiers wire bonding, the key challenges of the development include substrate level delamination at various layers. Molding process conditions, substrate design, and mismatch between substrate and molding compound properties were identified as the causes of delamination. Design of experiments and finite element analysis (FEA) simulation methodologies were applied to determine the optimum molding process conditions and the suitable substrate base material properties for overall process robustness improvement. With the robust design in place, package performance and reliability at MSL3@260C and 1000 cycles temperature cycling has been successfully achieved.
Keywords :
ball grid arrays; encapsulation; finite element analysis; lead bonding; moulding; semiconductor device manufacture; semiconductor device packaging; FEA; cavity down TBGA; finite element analysis; high density wire bonding; low k dielectric wafer technology; multitiers wire bonding; substrate base material properties; substrate level delamination; temperature cycling; top-gate molding process; ultra fine pitch wire bonding; Delamination; Dielectric materials; Dielectric substrates; Encapsulation; Mass production; Mechanical factors; Packaging; Robustness; Wafer bonding; Wire;
Conference_Titel :
Electronics Manufacturing and Technology, 31st International Conference on
Conference_Location :
Petaling Jaya
Print_ISBN :
978-1-4244-0730-9
Electronic_ISBN :
1089-8190
DOI :
10.1109/IEMT.2006.4456484