Title :
Investigation of the device design challenges and optimization issues associated with complementary SiGe HBT scaling
Author :
Chakraborty, Partha S. ; Moen, Kurt ; Bellini, Marco ; Cressler, John D.
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
Complementary bipolar technology (npn + pnp BJTs) has long been considered the "goId-standard" for analog applications requiring high speed, low noise, high bandwidth, large voltage swing, and large output drive. Bandgap-engineered complementary SiGe (C-SiGe) HBTs can provide significant leverage in the multiple tradeoffs involved in designing npn and pnp BJTs with matched performance (e.g., comparable/r)However, the inherent minority carrier transport issues associated with the pnp SiGe HBT device design need to be carefully addressed in order to successfully scale C-SiGe HBT technology for higher frequency operation. This TCAD-based investigation presents for the first time a comprehensive study of the device design challenges and optimization issues which will be necessarily encountered in scaling C-SiGe HBTs for high-performance analog applications.
Keywords :
Ge-Si alloys; heterojunction bipolar transistors; HBT device design; HBT scaling; SiGe; complementary SiGe HBT technology; complementary bipolar technology; device design challenges; heterojunction bipolar transistors; optimization issues; Design optimization; Doping profiles; Drives; Educational institutions; Germanium silicon alloys; Heterojunction bipolar transistors; Paper technology; Semiconductor process modeling; Silicon germanium; Thermal resistance;
Conference_Titel :
Semiconductor Device Research Symposium, 2009. ISDRS '09. International
Conference_Location :
College Park, MD
Print_ISBN :
978-1-4244-6030-4
Electronic_ISBN :
978-1-4244-6031-1
DOI :
10.1109/ISDRS.2009.5378034
