Title :
On-state current stress-induced subthreshold I–V instability in SiC DMOSFETs
Author :
Lelis, Aivars ; Green, Ron ; Habersat, Dan ; Goldsman, Neil
Author_Institution :
U.S. Army Res. Lab., MD, USA
Abstract :
The reliability of SiC DMOSFETs has been studied in the past several years, including gate oxide reliability with time-dependent dielectric breakdown measurements, and threshold voltage stability with gate-bias and On-state current stress measurements. For example, it has been reported that gate-bias stressing causes a time-dependent shift in threshold voltage, and that an On-state current stress causes a slightly larger threshold-voltage instability. Furthermore, it has been observed that an increase in Off-state leakage current can occur at high temperatures but which can be reduced with the application of a negative gate-bias, indicating an increase in subthreshold-voltage leakage current. It has also been reported that the bias-stress induced threshold-voltage instability increases at increasing temperatures for some SiC MOSFET sample sets.
Keywords :
MOSFET; semiconductor device reliability; silicon compounds; wide band gap semiconductors; DMOSFET; SiC; bias-stress induced threshold-voltage instability; gate oxide reliability; off-state leakage current; on-state current stress-induced subthreshold I-V instability; threshold voltage stability; time-dependent dielectric breakdown measurements; Current measurement; Dielectric breakdown; Dielectric measurements; Leakage current; Silicon carbide; Stability; Stress measurement; Temperature; Threshold voltage; Voltage measurement;
Conference_Titel :
Semiconductor Device Research Symposium, 2009. ISDRS '09. International
Conference_Location :
College Park, MD
Print_ISBN :
978-1-4244-6030-4
Electronic_ISBN :
978-1-4244-6031-1
DOI :
10.1109/ISDRS.2009.5378036