• DocumentCode
    3054726
  • Title

    Device Under Test (DUT) Socket Conversion to Improve Analog Loadboard Performance Efficiency

  • Author

    Yabut, Yolando G. ; Galauran, Francis F. ; Dator, Mario C. ; Encarnado, Jezrel D.

  • Author_Institution
    ON Semicond. Philippines Inc., Carmona
  • fYear
    2007
  • fDate
    8-10 Nov. 2007
  • Firstpage
    492
  • Lastpage
    495
  • Abstract
    This paper discusses modification on DUT socket hitting other problems ranging from over rejection, set-up loss to test escape through the incorporation of interlock switch that virtually foolproof the docking interlock mechanism. Design of experiment and actual simulation validate the effect and desire result. With this systematic approaches Analog loadboard performance brought significant improvement in productivity extending loadboard life cycle by eliminating severe PCB (printed circuit board) traces cause by repeated replacements of Pogo pins, eliminate monthly consumption of US$4K , set-up time improvement from 1 minute to 3 seconds and significant improvement in reducing the 46% open connection opportunity.
  • Keywords
    electric connectors; printed circuit testing; printed circuits; analog loadboard performance efficiency; device under test socket conversion; docking interlock mechanism; interlock switch; loadboard life cycle; Costs; Electric breakdown; Electronic equipment testing; Performance loss; Pins; Pulp manufacturing; Semiconductor device manufacture; Semiconductor device testing; Sockets; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Manufacturing and Technology, 31st International Conference on
  • Conference_Location
    Petaling Jaya
  • ISSN
    1089-8190
  • Print_ISBN
    978-1-4244-0730-9
  • Electronic_ISBN
    1089-8190
  • Type

    conf

  • DOI
    10.1109/IEMT.2006.4456500
  • Filename
    4456500