DocumentCode :
3054844
Title :
Integrating on-chip temperature sensors into DfT schemes and BIST architectures
Author :
Székely, V. ; Rencz, M. ; Courtois, B.
Author_Institution :
Dept. of Electron Devices, Tech. Univ. Budapest, Hungary
fYear :
1997
fDate :
27 Apr-1 May 1997
Firstpage :
440
Lastpage :
445
Abstract :
The continuously increasing power densities in integrated circuits necessitated the introduction of DfTT (Design for Thermal Testability) design methodology to prevent overheating effects. Newly developed CMOS temperature sensors enable the application of DfTT principle in safety-critical circuits. Parameters and operation principles of the low-power small-area temperature sensor family are presented in details in the paper, followed by the discussion of placement and testing strategies
Keywords :
CMOS integrated circuits; built-in self test; design for testability; integrated circuit testing; temperature measurement; temperature sensors; BIST; DfTT; design for thermal testability; integrated circuit testing; on-chip low-power small-area CMOS temperature sensor; safety-critical circuit; Built-in self-test; CMOS digital integrated circuits; CMOS technology; Circuit testing; Energy consumption; Integrated circuit testing; MOSFETs; Power system reliability; Temperature measurement; Temperature sensors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1997., 15th IEEE
Conference_Location :
Monterey, CA
ISSN :
1093-0167
Print_ISBN :
0-8186-7810-0
Type :
conf
DOI :
10.1109/VTEST.1997.600330
Filename :
600330
Link To Document :
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