DocumentCode
3055142
Title
A video display processing platform for future TV concepts
Author
de With, P.H.N. ; Jaspers, E.G.T. ; Timmer, A.H. ; Van Meerbergen, J.L.
Author_Institution
Fac. of Comput. Eng., Mannheim Univ., Germany
fYear
1999
fDate
22-24 June 1999
Firstpage
208
Lastpage
209
Abstract
This paper presents a generic video processing platform architecture enabling HW-SW partitioning with high flexibility and programmability. This modular concept is suitable for a large range of applications and features and is used for implementation of a TV platform. A key feature is to create SW programmability for video signal manipulation at the functional and system levels and give cost-effective HW support for pixel-based processing.
Keywords
digital signal processing chips; television receivers; video signal processing; HW-SW partitioning; SW programmability; TV platform; flexibility; functional and system level; future TV concepts; generic video processing platform architecture; implementation; pixel-based processing; programmability; system level; video display processing platform; video signal manipulation; Application software; Bandwidth; Computer architecture; Coprocessors; Displays; Hardware; Protocols; Random access memory; Read-write memory; TV;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics, 1999. ICCE. International Conference on
Conference_Location
Los Angeles, CA, USA
Print_ISBN
0-7803-5123-1
Type
conf
DOI
10.1109/ICCE.1999.785234
Filename
785234
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