Title :
A Cost-Effective Dependable Microcontroller Architecture with Instruction-Level Rollback for Soft Error Recovery
Author :
Sakata, Teruaki ; Hirotsu, Teppei ; Yamada, Hiromichi ; Kataoka, Takeshi
Author_Institution :
Hitachi Ltd., Tokyo
Abstract :
A cost-effective, dependable microcontroller architecture has been developed. To detect soft errors, we developed an electronic design automation (EDA) tool that generates optimized soft error-detecting logic circuits for flip-flops. After a soft error is detected, the error detection signal goes to a developed rollback control module (RCM), which resets the CPU and restores the CPU´s register file from the backup register file using a rollback program routine. After the routine, the CPU restarts from the instruction executed before the soft error occurred. In addition, there is a developed error reset module (ERM) that can restore the RCM from soft errors. We also developed an error correction module (ECM) that corrects ECC errors in RAM after error detection with no delay overheads. Testing on a 32- bit RISC microcontroller and EEMBC benchmarks showed that the area overhead was under 59% and frequency overhead was under 9%. In a soft error injection simulation, the MTBF of random logic circuits, and the MTBF of RAM were 30 and 1.34 times longer, respectively, than those of the original microcontroller.
Keywords :
error correction; microcontrollers; system recovery; cost-effective dependable microcontroller; electronic design automation; error correction module; error reset module; instruction-level rollback; rollback control module; soft error recovery; Automatic control; Central Processing Unit; Design optimization; Electronic design automation and methodology; Error correction; Flip-flops; Logic circuits; Microcontrollers; Registers; Signal detection;
Conference_Titel :
Dependable Systems and Networks, 2007. DSN '07. 37th Annual IEEE/IFIP International Conference on
Conference_Location :
Edinburgh
Print_ISBN :
0-7695-2855-4