DocumentCode
3056416
Title
Multimedia system on a chip for set-top box applications
Author
Easwar, V. ; Campbell, G. ; Natarajan, R.
Author_Institution
Equator Technol. Inc., Campbell, CA, USA
fYear
1999
fDate
22-24 June 1999
Firstpage
356
Lastpage
357
Abstract
The MAP VLIW processor architecture provides an integrated programmable solution for set-top box (STB) terminal manufacturers-enabling multiple media applications (e.g. MPEG2 decode of one channel, digital PIP on another) to operate simultaneously on one chip. Alternately one can operate a single high quality application, like down decoding of high-definition television (HDTV) to standard television (STV). STB designers can program these applications using their proprietary algorithms in a high-level language, enabling easy product differentiation (such as cost vs. features, picture/sound quality, etc.) in a market segment full of several fixed-function solutions. New applications or upgrades can be downloaded to the STB. We describe how typical STB applications are mapped to the MAP parallel processing architecture.
Keywords
decoding; digital signal processing chips; high definition television; multimedia communication; parallel architectures; telecommunication terminals; video coding; HDTV; MAP VLIW processor architecture; MAP parallel processing architecture; MPEG2 decoding; algorithms; digital PIP; high-definition television; high-level language; integrated programmable solution for; multimedia system on chip; picture/sound quality; set-top box applications; standard television; terminal manufacturers; Algorithm design and analysis; Costs; Decoding; HDTV; High level languages; Manufacturing processes; Multimedia systems; TV; US Department of Transportation; VLIW;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics, 1999. ICCE. International Conference on
Conference_Location
Los Angeles, CA, USA
Print_ISBN
0-7803-5123-1
Type
conf
DOI
10.1109/ICCE.1999.785403
Filename
785403
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