Title :
Low-power high-speed dual-modulus prescaler for Gb/s applications
Author :
Keping Wang ; Kaixue Ma ; Kiat Seng Yeo
Author_Institution :
IC Design Centre of Excellence, Nanyang Technol. Univ., Singapore, Singapore
Abstract :
This paper present a low-power 10-GHz divide-by-3/4 prescaler for 60-GHz high data rate short range wireless communication systems. Design techniques utilized to optimize the power consumption are addressed. The critical circuit, current-mode-logic (CML) blocks, are optimized to achieve high speed and low power consumption simultaneously. The prescaler is implemented in a low-cost commercial 0.18-μm SiGe BiCMOS technology. The maximum operating frequency is up to 10 GHz, with 8.6 mW power consumption in 1.8 V supply. The core area is 190 μm×120 μm.
Keywords :
BiCMOS integrated circuits; Ge-Si alloys; bipolar MIMIC; bipolar MMIC; current-mode logic; low-power electronics; prescalers; Gb/s applications; SiGe; SiGe BiCMOS technology; critical circuit; current-mode-logic blocks; frequency 10 GHz; frequency 60 GHz; low power consumption; low-power divide-by-3/4 prescaler; low-power high-speed dual-modulus prescaler; power 8.6 mW; short range wireless communication; size 0.18 mum; voltage 1.8 V; BiCMOS integrated circuits; Frequency conversion; Frequency synthesizers; Logic gates; Phase locked loops; Power demand; Topology;
Conference_Titel :
Circuits and Systems (APCCAS), 2012 IEEE Asia Pacific Conference on
Conference_Location :
Kaohsiung
Print_ISBN :
978-1-4577-1728-4
DOI :
10.1109/APCCAS.2012.6419020
