DocumentCode
3057374
Title
A New Completely Digital Recovery Circuit Design of High Speed Serial Interface System
Author
Cheng, Wei ; Sun, Yujie ; Tan, Zhenhua ; Chang, Guiran
Author_Institution
Coll. of Software, Univ. of Northeastern, Shenyang
fYear
2007
fDate
14-17 Sept. 2007
Firstpage
124
Lastpage
126
Abstract
In the design of high speed serial interface chip, the recovery circuit of high speed serial data is a difficulty. A recovery circuit of high speed serial data for the high speed serial interface of SATA 1.0 is proposed in this article, which is designed completely with digital circuit and implemented with standard cell, without adopting PLL or DLL analog design. Comparing with the serial data recovery circuit designed with analog circuit, this circuit is simpler and easier to implemented with less area and power consumption. It is applied in the bridge connection chip HPT183 of PATA/SATA and delivered with 0.18CMOS technology.
Keywords
clocks; field buses; digital recovery circuit design; high speed serial interface system; serial data recovery circuit; Acceleration; Analog circuits; Circuit synthesis; Clocks; Optical signal processing; Phase locked loops; Sampling methods; Signal processing; Signal restoration; Synchronization;
fLanguage
English
Publisher
ieee
Conference_Titel
Bio-Inspired Computing: Theories and Applications, 2007. BIC-TA 2007. Second International Conference on
Conference_Location
Zhengzhou
Print_ISBN
978-1-4244-4105-1
Electronic_ISBN
978-1-4244-4106-8
Type
conf
DOI
10.1109/BICTA.2007.4806433
Filename
4806433
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