• DocumentCode
    30576
  • Title

    High-Performance H.264/AVC Intra-Prediction Architecture for Ultra High Definition Video Applications

  • Author

    Gang He ; Dajiang Zhou ; Wei Fei ; Zhixiang Chen ; Jinjia Zhou ; Goto, Satoshi

  • Author_Institution
    Grad. Sch. of Inf., Production & Syst., Waseda Univ., Kitakyushu, Japan
  • Volume
    22
  • Issue
    1
  • fYear
    2014
  • fDate
    Jan. 2014
  • Firstpage
    76
  • Lastpage
    89
  • Abstract
    This paper presents an H.264/AVC intra-prediction design for ultrahigh definition (ultra-HD) video. Due to the huge throughput requirements of ultra-HD, design challenges such as complexity and data dependency, which currently exist for lower resolutions, become even more critical. To solve these problems, we first propose an interlaced block reordering scheme together with a preliminary mode decision (PMD) strategy to resolve the data dependency between intra mode decision and reconstruction. In the meantime, hardware cost is reduced by PMD. We also propose a probability-based reconstruction scheme to solve the problem of long pipeline latency. In addition, hardware reuse strategies including a shared fine decision module and processing element-reusable prediction generator, are applied to further optimize the design. As a result, the hardware complexity is reduced by 77% in terms of area and frequency, and it takes an average of 33 cycles to process a macroblock. The implementation result demonstrates that our design can support up to the specification of 7680 × 4320p 60 f/s when running at 273 MHz. The design is implemented with 451.5 k gates in 65-nm CMOS.
  • Keywords
    CMOS integrated circuits; high definition video; video coding; CMOS; PMD strategy; data dependency; frequency 273 MHz; hardware complexity; hardware cost; hardware reuse strategies; high-performance H.264-AVC intraprediction architecture; interlaced block reordering scheme; intramode decision; pipeline latency; preliminary mode decision strategy; probability-based reconstruction scheme; processing element-reusable prediction generator; shared fine decision module; size 65 nm; ultraHD video; ultrahigh-definition video application; Complexity theory; Computer architecture; Encoding; Hardware; Pipelines; Standards; Video coding; Data dependency; H.264/AVC; hardware architecture; intra prediction;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2012.2235090
  • Filename
    6421009