A generalized method for simultaneous fault analysis

A generalized method for simultaneous fault analysis in an electrical power system is proposed in this paper. The method is based on the admittance-type representation of power-system sequence networks. After defining suitable boundary conditions for series faults in terms of bus quantities, the reduced negative and zero sequence equations at the faulted buses are determined. Then, a simple procedure is suggested for obtaining the augmented positive sequence admittance matrix of the faulted power system. The suggested procedure proves useful to analyze any combination of faults without limit of number, type (balanced or unbalanced), phase, or location of fault. Moreover, sparse-matrix techniques and optimally reordered triangular factorisation can be easily implemented to optimize the computer resources. The method can be easily integrated in existing calculation programs through a separate subroutine. A simple test system is considered to illustrate the potentials of the suggested procedure