Title :
Current reference with temperature compensation for low power applications
Author :
Jiaxin Liu ; Yao Wang ; Liangbo Xie ; Guangjun Wen
Author_Institution :
Centre for RFIC & Syst. Technol., Univ. of Electron. Sci. & Technol. of China, Chengdu, China
Abstract :
This paper proposes an all CMOS current reference with temperature compensation for low power applications. An offset voltage between the gate terminals of two MOS transistors is utilized to improve the temperature dependency caused by the carrier mobility. The circuit is designed and simulated in 0.18 μm standard CMOS technology. With a 52 nA output current, the temperature coefficient is 60 ppm/°C in a temperature range from -40 °C to 85 °C, the maximum process corner deviation is ±3%, the line regulation is 1780 ppm/V with a supply voltage ranging from 0.95 V to 2.5 V.
Keywords :
CMOS integrated circuits; MOSFET; carrier mobility; compensation; integrated circuit design; low-power electronics; CMOS current reference; MOS transistors; carrier mobility; current 52 nA; gate terminals; line regulation; low power applications; maximum process corner deviation; offset voltage; output current; size 0.18 mum; standard CMOS technology; temperature -40 degC to 85 degC; temperature coefficient; temperature compensation; temperature dependency; voltage 0.95 V to 2.5 V; CMOS integrated circuits; Logic gates; MOSFETs; Temperature dependence; Temperature distribution; Threshold voltage;
Conference_Titel :
Circuits and Systems (APCCAS), 2012 IEEE Asia Pacific Conference on
Conference_Location :
Kaohsiung
Print_ISBN :
978-1-4577-1728-4
DOI :
10.1109/APCCAS.2012.6419088
