DocumentCode :
3058433
Title :
0.6 – 3.6 GHz wideband operation with high phase resolution On-Chip Network Analyzer
Author :
Johari, Ayob Hj ; Ishikuro, Hiroki
Author_Institution :
Dept. of Electron. & Electr. Eng., Keio Univ., Yokohama, Japan
fYear :
2012
fDate :
2-5 Dec. 2012
Firstpage :
539
Lastpage :
542
Abstract :
In this paper, we have shown the design of a wideband operation On-chip Network Analyzer (OCNA) in 45nm CMOS. Its maximum operation ranges from 0.6 ~ 3.6 GHz with maximum phase resolution of 0.3 degree, and maximum power consumption of 3.2 mW/GHz in Cadence Spectre circuit simulation. The OCNA effective area is 0.072 mm2 which is the smallest compared to previous research group. The OCNA performance is assess by monitoring the Circuit-under-Test (CUT) frequency characteristics. The proposed OCNA successfully captures the waveform and also the CUT frequency characteristic.
Keywords :
CMOS integrated circuits; circuit simulation; integrated circuit testing; low-power electronics; network-on-chip; CMOS integrated circuit; CUT frequency characteristics; Cadence Spectre circuit simulation; circuit-under-test; frequency 0.6 GHz to 3.6 GHz; high phase resolution; on-chip network analyzer; power consumption; size 45 nm; wideband operation; Calibration; Generators; MOS devices; Monitoring; Oscillators; System-on-a-chip; Wideband;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (APCCAS), 2012 IEEE Asia Pacific Conference on
Conference_Location :
Kaohsiung
Print_ISBN :
978-1-4577-1728-4
Type :
conf
DOI :
10.1109/APCCAS.2012.6419091
Filename :
6419091
Link To Document :
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