Floating-body-effect-related gate tunneling leakage current phenomenon of 40nm PD SOI NMOS device

In this paper, analysis of the floating-body-effect-related gate tunneling leakage current phenomenon of the 40 nm PD NMOS device using the SPICE bipolar/MOS equivalent circuit approach was reported. From the figure, it was observed that the edge component of the gate-source/gate-drain leakage current (I_gs/I_gd), which is much smaller than that of the center channel one (I_gcs/I_gcd), could become negative at a large V_D due to the reverse vertical electric field near the drain. The dominant component of the gate tunneling leakage current in the center channel region (I_gcs/I_gcd) was strongly dependent on V_G. A smaller V_G leads to a larger II region, makes a stronger parasitic bipolar device with a larger base voltage at a large V_D - the floating body effect. As a result, the voltage difference between the gate and the thin film drops. Therefore, the vertical electric field in the gate oxide, especially near the drain, was reduced substantially. I_gcs/I4 and thus I_g become smaller-the floating-body induced gate tunneling leakage current effect. Using the SPICE bipolar/MOS equivalent circuit approach, this effect could be analyzed in a straightforward way.