Title :
Modeling, simulation and verification of void transfer process for patterning nm scale features
Author :
Josan, Guriqbal Singh ; Kurinec, Santosh K.
Author_Institution :
Dept. of Microelectron. Eng., Rochester Inst. of Technol., Rochester, NY, USA
Abstract :
The mainstay of this work is simulation and verification of a revolutionary void transfer process for nm scale features. In conclusion, the effects of geometrical factors on the void transfer process have been simulated using a modeling software and verified experimentally.
Keywords :
voids (solid); modeling software; void transfer process; CMOS technology; Educational institutions; Microelectronics; Optical films; Paper technology; Silicon compounds; Solid modeling; Space technology; Wet etching; X-ray lithography;
Conference_Titel :
Semiconductor Device Research Symposium, 2009. ISDRS '09. International
Conference_Location :
College Park, MD
Print_ISBN :
978-1-4244-6030-4
Electronic_ISBN :
978-1-4244-6031-1
DOI :
10.1109/ISDRS.2009.5378229