Title :
SCAN - Secure Processor
Author :
Kannavara, Raghudeep ; Bourbakis, Nikolaos G. ; Dollas, Apostolos ; Athanas, Peter
Author_Institution :
Wright State Univ., Dayton, OH
Abstract :
This paper presents the design of the SCAN secure processor. The SCAN secure processor is a modified SparcV8 processor architecture offering a SCAN-based encryption and decryption of 32 bit instructions and data. We further discuss the evaluation of the proposed SCAN-SP architecture with certain simulated benchmark applications.
Keywords :
cryptography; logic design; microprocessor chips; SCAN secure processor; SCAN-based decryption; SCAN-based encryption; SparcV8 processor architecture; Buildings; Computational modeling; Computer architecture; Computer hacking; Cryptography; Distributed computing; Hardware; Information security; Production; Registers;
Conference_Titel :
Aerospace and Electronics Conference, 2008. NAECON 2008. IEEE National
Conference_Location :
Dayton, OH
Print_ISBN :
978-1-4244-2615-7
Electronic_ISBN :
7964-0977
DOI :
10.1109/NAECON.2008.4806549
