Title :
Nano-CMOS circuit design and performance evaluation by inclusion of ballistic transport processes
Author :
Chek, Desmond C Y ; Tan, Michael L P ; Arora, Vijay K.
Author_Institution :
Fac. of Electr. Eng., Univ. Teknol. Malaysia, Skudai, Malaysia
Abstract :
The scaling of channel length and width in a nanoscale n-type MOSFET (NMOS) and ptype MOSFET (PMOS) is examined in ballistic (B) nano-CMOS design. The ballistic process is predominant in a nanoscale device when channel length is shorter than the mean free path. Our predictive model agrees well with 45nm experimental data from IBM. It is shown that the mobility is lower in the short channel device compared to the mobility in the long channel device due to the ballistic process.
Keywords :
CMOS integrated circuits; ballistics; electron mobility; inclusions; integrated circuit design; ballistic transport processes; inclusion; mobility; nanoCMOS circuit design; nanoscale n-type MOSFET; performance evaluation; ptype MOSFET; short channel device; size 45 nm; Ballistic transport; Circuit synthesis; Design engineering; Educational institutions; Electron mobility; MOS devices; MOSFET circuits; Physics; Semiconductor device modeling; Turing machines;
Conference_Titel :
Semiconductor Device Research Symposium, 2009. ISDRS '09. International
Conference_Location :
College Park, MD
Print_ISBN :
978-1-4244-6030-4
Electronic_ISBN :
978-1-4244-6031-1
DOI :
10.1109/ISDRS.2009.5378261
