DocumentCode
3060487
Title
A new level of signal processing software: Automatic buffer address generation
Author
Fisher, Joseph R. ; Kaliski, Martin E. ; Kaliski, Burton S.
Author_Institution
Signal Processing Systems, Inc. Waltham, MA
Volume
8
fYear
1983
fDate
30407
Firstpage
1180
Lastpage
1183
Abstract
Signal processors and array processors use buffers to hold signal samples and access the buffer elements in specified orders to effect various processing algorithms. Array processor libraries normally only provide language level support for one-dimensional buffers and for address sequences that are, themselves, essentially one-dimensional. The SPS-1000, developed by Signal Processing Systems, Inc., (SPS), uses high speed address generation hardware and a sophisticated set of FORTRAN routines, to significantly expand upon these capabilities. The library routines allow the definitions of multi-dimensional buffers, and, with the use of nested loop constructions (similar to the "implied DO" facility of FORTRAN READ or WRITE statements) the user may specify continuously evolving address sequences which can effect a continuous flow of n-dimensional data objects (n > = 0) through these buffers in an efficient manner. Examples illustrating both the power and the simplicity of these specifications are given.
Keywords
Array signal processing; Delay effects; Finite impulse response filter; Hardware; Libraries; Memory management; Process control; Signal generators; Signal processing; Signal processing algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '83.
Type
conf
DOI
10.1109/ICASSP.1983.1171911
Filename
1171911
Link To Document