Systolic processors applied to computer vision systems

Low level image processing needs to apply simple operations to large sets of data. This processing has to be done quickly. Systolic processors enable this to be done. This study describes the design of a reconfigurable systolic processor for the iconic processing of images in real time (video rate). The computers of the processor (basic cells, delay elements, and interconnection network) are presented paying special attention to the basic cell. The basic operations used in the iconic processing of images are studied. The cell is designed so that it can carry out these operations. In the results section, the configurations of the processor for some preprocessing algorithms (convolution, median filtering, narrow edge extraction) are presented and the typical performance of the processor and the techniques used (segmentation and parallelism) are also shown