DocumentCode
306293
Title
Petri net controller with hardware to avoid deadlocks
Author
Dohi, Yasunori ; Nomura, Eiji ; Shimoda, Teruaki ; Murakoshi, Hideki
Author_Institution
Fac. of Eng., Yokohama Nat. Univ., Japan
Volume
1
fYear
1996
fDate
5-10 Aug 1996
Firstpage
457
Abstract
We have proposed a high speed Petri net sequence controller for systems described in Petri nets. Its hardware is capable of checking whether a transition is fireable or not, although we did not take deadlocks into consideration. If a controller described in the Petri net has deadlocks, the proper methods to avoid them is to redesign the Petri net of the controller. But sometimes it is difficult to change the net or insert several places to avoid deadlocks, because there are no general methods to remove them. Thus we propose here a hardware to avoid deadlocks without changing the Petri net graph. The hardware unit inside the Petri net controller detects unsafe markings leading to deadlocks and prevents the current transition from being fired. The unit consists of three memory tables and some logical units to detect the matching of a current marking with those in the tables. It requests one memory cycle to check one only state. This idea can be used to avoid the undesired marking of the controlled object
Keywords
Petri nets; programmable controllers; reliability; system recovery; Petri net graph; Petri net sequence controller; deadlocks avoidance; factory automation; hardware; logical units; memory tables; programmable controllers; unsafe markings detection; Automatic control; Control systems; Error correction; Fires; Hardware; Manufacturing automation; Petri nets; Programmable control; System recovery; Tree graphs;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Electronics, Control, and Instrumentation, 1996., Proceedings of the 1996 IEEE IECON 22nd International Conference on
Conference_Location
Taipei
Print_ISBN
0-7803-2775-6
Type
conf
DOI
10.1109/IECON.1996.570996
Filename
570996
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