DocumentCode
3063023
Title
Integration of polycide/metal capacitors in advanced device fabrication
Author
Yin, Aiguo ; White, Joe ; Karroy, Arjun ; Hu, Chun
Author_Institution
Rockwell Int. Corp., Newport Beach, CA, USA
fYear
1998
fDate
1998
Firstpage
131
Lastpage
134
Abstract
Polycide/metal capacitors with high unit area capacitance and high linearity are successfully integrated into submicron CMOS device fabrication. The capacitor implementation is modular and low cost: the capacitor dielectric is deposited at low temperature and only one additional mask is needed for patterning the capacitor top plate. High voltage-capacitance linearity is obtained for the TEOS oxide capacitors of the capacitance density at 1 fFμm2, with the linear voltage coefficient of capacitance LVCC <5 ppm/V and the quadratic voltage coefficient of capacitance QVCC<2 ppm/V2. For the nitride capacitors, 1.5 fF/μm2 unit area capacitance is obtained with the LVCC <70 ppm/V and the QVCC <20 ppm/V2
Keywords
CMOS integrated circuits; MOS capacitors; capacitance; masks; TEOS oxide capacitors; advanced device fabrication; capacitor dielectric; capacitor top plate; high linearity; high unit area capacitance; high voltage-capacitance linearity; integration; linear voltage coefficient; low cost; mask; nitride capacitors; patterning; polycide/metal capacitors; quadratic voltage coefficient; submicron CMOS device fabrication; Capacitance; Capacitors; Dielectric substrates; Fabrication; Leakage current; Linearity; Rough surfaces; Surface roughness; Temperature; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology, 1998. Proceedings. 1998 5th International Conference on
Conference_Location
Beijing
Print_ISBN
0-7803-4306-9
Type
conf
DOI
10.1109/ICSICT.1998.785821
Filename
785821
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