DocumentCode :
3063231
Title :
The APS-II processor for speech recognition
Author :
Lewis, Larry ; Amitai, Zwie ; Silverman, Harvey F.
Author_Institution :
Bell Telephone Laboratories, North Andover, MA
Volume :
8
fYear :
1983
fDate :
30407
Firstpage :
483
Lastpage :
486
Abstract :
Special architectures are required for real-time response for dynamic programming for speech recognition. One approach for handling these computations, is to use a high-speed, programmable, inexpensive, attached processor. Comparison is made between the performance of the two implementations of such a processor and that of a fast, conventional microprocessor.
Keywords :
Computer architecture; Dynamic programming; Hardware; Laboratories; Microprocessors; Pipeline processing; Read-write memory; Registers; Speech recognition; Telephony;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '83.
Type :
conf
DOI :
10.1109/ICASSP.1983.1172036
Filename :
1172036
Link To Document :
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