Title :
System-level Built-In Self-Test of global routing resources in Virtex-4 FPGAs
Author :
Yao, Jia ; Dixon, Bobby ; Stroud, Charles ; Nelson, Victor
Author_Institution :
Dept. of Electr. & Comput. Eng., Auburn Univ., Auburn, AL
Abstract :
We describe the implementation of a cross-coupled parity built-in self-test (BIST) approach for the global routing resources in field programmable gate arrays (FPGAs). The BIST approach facilitates system-level testing of the FPGA global routing resources prior to configuring the intended system function for high reliability/availability systems. We discuss the application of the BIST approach to the global routing resources in Xilinx Virtex-4 FPGAs including experimental results of implementations in actual devices.
Keywords :
automatic test pattern generation; built-in self test; circuit reliability; field programmable gate arrays; network routing; BIST; Xilinx Virtex-4 FPGA; cross-coupled parity built-in self-test; field programmable gate array; global routing resources; high availability system; high reliability system; system-level built-in self-test; Automatic testing; Built-in self-test; Field programmable gate arrays; Logic testing; Multiplexing; Programmable logic arrays; Programmable logic devices; Routing; System testing; Wire; Virtex-4; built-in self-test; field programmable gate arrays; global routing resources;
Conference_Titel :
System Theory, 2009. SSST 2009. 41st Southeastern Symposium on
Conference_Location :
Tullahoma, TN
Print_ISBN :
978-1-4244-3324-7
Electronic_ISBN :
0094-2898
DOI :
10.1109/SSST.2009.4806782
