Built-In Self-Test of digital signal processors in Virtex-4 FPGAs

Author

Pulukuri, Mary D. ; Stroud, Charles E.

Author_Institution

Dept. of Electr. & Comput. Eng., Auburn Univ., Auburn, AL

fYear

2009

fDate

15-17 March 2009

Firstpage

34

Lastpage

38

Abstract

We present a Built-In Self-Test (BIST) approach for testing and diagnosing the embedded digital signal processors (DSPs) in Xilinx Virtex-4 series Field Programmable Gate Arrays (FPGAs). The BIST architecture and configurations needed to test these programmable DSPs in all of their modes of operation are presented along with fault injection and timing analysis of the BIST configurations.

Keywords

built-in self test; digital signal processing chips; fault diagnosis; field programmable gate arrays; timing; BIST architecture; BIST configuration; Virtex-4 FPGA; Xilinx Virtex-4 series; built-in self-test; embedded digital signal processors; fault injection; field programmable gate arrays; programmable DSP; timing analysis; Automatic testing; Built-in self-test; Digital signal processing; Digital signal processors; Embedded computing; Field programmable gate arrays; Logic arrays; Logic programming; Logic testing; Programmable logic arrays; Built-In Self-Test; Field Programmable Gate Array; Virtex-4; adder test; digital signal processor; multiplier test;

fLanguage

English

Publisher

ieee

Conference_Titel

System Theory, 2009. SSST 2009. 41st Southeastern Symposium on

Conference_Location

Tullahoma, TN

ISSN

0094-2898

Print_ISBN

978-1-4244-3324-7

Electronic_ISBN

0094-2898

Type

conf

DOI

10.1109/SSST.2009.4806783

Filename

4806783