An integrated approach to real-time pattern recognition

Author

Sicard, E. ; Font, J. ; Homar, M. ; Rubio, A.

fYear

1992

fDate

30 Aug-3 Sep 1992

Firstpage

177

Lastpage

180

Abstract

This paper details the architecture and design of a VLSI CMOS retina dedicated to very fast pattern recognition. The implementation of the recognition algorithms into silicon are detailed. The performances of the ixj pixel retina are evaluated for various input pattern sizes. A 64×32 pixel integrated circuit design is presented which performs a pattern recognition and localisation in less than 100 μs. The application considered is character recognition

Keywords

CMOS integrated circuits; VLSI; character recognition; image processing equipment; image recognition; image sensors; real-time systems; 100 mus; VLSI CMOS retina; character recognition; integrated circuit design; real-time pattern recognition; very fast pattern recognition; Circuits; Image recognition; Matrix converters; Optical sensors; Pattern recognition; Pixel; Retina; Silicon; Very large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Pattern Recognition, 1992. Vol. IV. Conference D: Architectures for Vision and Pattern Recognition, Proceedings., 11th IAPR International Conference on

Conference_Location

The Hague

Print_ISBN

0-8186-2925-8

Type

conf

DOI

10.1109/ICPR.1992.202160

Filename

202160

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3064804