Title :
An analog CMOS programmable and configurable neural network
Author_Institution :
Pretoria Univ., South Africa
fDate :
30 Aug-3 Sep 1992
Abstract :
The object of this paper is to describe an analog CMOS realization of a programmable and configurable neural network chip and the mixed-mode analog/digital system it will be used in. The intention is that the chip(s) be used in the environment of a digital host computer, with the training or learning algorithm implemented in software, while also permitting operation in a stand-alone execution phase
Keywords :
CMOS integrated circuits; VLSI; feedforward neural nets; mixed analogue-digital integrated circuits; neural chips; reconfigurable architectures; analog CMOS; configurable neural network chip; digital host computer; learning algorithm; mixed-mode analog/digital system; multilayer perceptron; stand-alone execution phase; training; Africa; CMOS technology; Circuits; Inverters; Network topology; Neural networks; Neurons; Semiconductor device modeling; Signal representations; Voltage;
Conference_Titel :
Pattern Recognition, 1992. Vol. IV. Conference D: Architectures for Vision and Pattern Recognition, Proceedings., 11th IAPR International Conference on
Conference_Location :
The Hague
Print_ISBN :
0-8186-2925-8
DOI :
10.1109/ICPR.1992.202171
