Title :
Methods for reducing soft errors in deep submicron integrated circuits
Author :
Zhang, Kevin ; Hareland, Scott ; Senyk, Boys ; Maiz, Jose
Author_Institution :
Intel Corp., Hillsboro, OR, USA
Abstract :
Soft errors are a major challenge for the continuing miniaturization of integrated circuits. Methods for reducing the soft error rate (SER) in variety of digital CMOS circuits are discussed. These methods are effective at maximizing the robustness of circuits against particle strikes while keeping design overhead at a minimum
Keywords :
CMOS digital integrated circuits; errors; integrated circuit design; radiation hardening (electronics); deep submicron integrated circuit; digital CMOS circuit; miniaturization; particle strike; robust design; soft error rate; Capacitance; Charge measurement; Current measurement; Feedback loop; Logic circuits; Logic gates; Loss measurement; Particle measurements; Robustness; Voltage;
Conference_Titel :
Solid-State and Integrated Circuit Technology, 1998. Proceedings. 1998 5th International Conference on
Conference_Location :
Beijing
Print_ISBN :
0-7803-4306-9
DOI :
10.1109/ICSICT.1998.785935
