• DocumentCode
    3065123
  • Title

    Easily testable VLSI design intelligent selection and insertion system DISIS

  • Author

    Xinguang, Peng ; Fenge, Bai ; Zhaoguang, Meng

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Taiyuan Univ. of Technol., China
  • fYear
    1998
  • fDate
    1998
  • Firstpage
    536
  • Lastpage
    539
  • Abstract
    DISIS is a knowledge based intelligent system that advises the VLSI designers on selecting and inserting the best design for testability (DFT) for a particular VLSI circuit to satisfy a set of parameter requirements and design goals. The DISIS system is different from the previous approaches in three main aspects. The DFT techniques are inserted only to the critical ports identified by testability analysis. The multiple description and a new cost evaluation function are introduced to the DISIS system
  • Keywords
    VLSI; circuit CAD; design for testability; high level synthesis; integrated circuit design; integrated circuit testing; knowledge based systems; DFT insertion; DISIS; VLSI design; cost evaluation function; critical ports identification; design for testability; knowledge based intelligent system; multiple description function; testability analysis; Circuit testing; Controllability; Cost function; Design for testability; Hardware; Intelligent systems; Observability; Shift registers; System testing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology, 1998. Proceedings. 1998 5th International Conference on
  • Conference_Location
    Beijing
  • Print_ISBN
    0-7803-4306-9
  • Type

    conf

  • DOI
    10.1109/ICSICT.1998.785940
  • Filename
    785940