Fixed-point implementation of adaptive digital filters

This paper presents some preliminary results on the behavior of adaptive digital filters when implemented with fixed-point arithmetic. In particular, adaptive prediction error filters configured in both tapped-delay line and lattice forms are examined and their performance is compared in terms of the number of bits required to reach a given steady-state error level. The lattice structures are of special interest since, at least in the non-adaptive case, they are known to have well-behaved numerical properties (as compared with a tapped-delay line realization) when implemented with fixed-point arithmetic. The results of our study indicate that this is also true in the adaptive case. Ideally, this study should ultimately lead to efficient implementations (e.g., in VLSI) of adaptive digital filters.