• DocumentCode
    3066154
  • Title

    A vertical Si/Si1-xGex heterojunction pMOSFET with reduced DIBL sensitivity, using a novel gate dielectric approach

  • Author

    Verheyen, P. ; Collaert, N. ; Caymax, M. ; Loo, Roger ; De Meyer, K. ; Van Rossum, M.

  • Author_Institution
    IMEC, Heverlee, Belgium
  • fYear
    1999
  • fDate
    1999
  • Firstpage
    19
  • Lastpage
    22
  • Abstract
    This paper describes a novel vertical pMOS transistor, based on a Si/Si(1-x)Gex heterojunction at the source/channel interface and using a sacrificial Si layer oxidation as gate dielectric
  • Keywords
    Ge-Si alloys; MOSFET; elemental semiconductors; oxidation; semiconductor heterojunctions; semiconductor materials; silicon; DIBL; Si-SiGe; Si/Si(1-x)Gex heterojunction; VAHMOS transistor; gate dielectric; sacrificial Si layer oxidation; vertical pMOSFET; Chemical vapor deposition; Dielectrics; Doping profiles; Etching; Germanium silicon alloys; Heterojunctions; MOSFET circuits; Oxidation; Silicon germanium; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, Systems, and Applications, 1999. International Symposium on
  • Conference_Location
    Taipei
  • ISSN
    1524-766X
  • Print_ISBN
    0-7803-5620-9
  • Type

    conf

  • DOI
    10.1109/VTSA.1999.785989
  • Filename
    785989
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3066154