"Design and realisation of adaptive lattice filters"

This paper compares the relative advantages of discrete and integrated circuit transversal and lattice adaptive filter designs. It discusses the trade-offs between the traditional transversal filter and the gradient adaptive lattice (GAL), showing that the reliable rate of convergence of the lattice is offset by a greater complexity and algorithm noise. Two 16-stage hardware implementations are described. One is a TTL GAL equaliser based on a single 12-bit parallel multiplier. The second is a suite of 5 custom NMOS bit-serial arithmetic LSI chips, which together make a lattice prediction-error filter. Both implementations offer 12-bit precisions and bandwidths of over 8 kHz. This shows that the increased complexity of the lattice approach can easily be accommodated in custom VLSI circuit designs.