DocumentCode
3067004
Title
On the cell misalignment for multilevel storage FLASH E2PROM
Author
Wang, Chih Hsin ; Hemming, Mark ; Klinger, Pavel ; Kordesch, Albert V. ; Liu, Chun-Mai ; Su, Ken
Author_Institution
Inf. Storage Devices, San Jose, CA, USA
fYear
1999
fDate
1999
Firstpage
191
Lastpage
194
Abstract
This paper presents for the first time the manufacturing issues due to cell misalignment encountered in multilevel FLASH memories. Split gate memory cells in mirrored pairs show varied program efficiency upon less ideal alignment, where device with a shorter Lsg has a poorer efficiency. This misalignment adversely impacts the dynamic range of the storage levels
Keywords
cellular arrays; flash memories; integrated circuit manufacture; multivalued logic; cell misalignment; dynamic range; manufacturing issues; mirrored pairs; multilevel storage FLASH E2PROM; program efficiency; split gate memory cells; storage levels; Current supplies; Dynamic range; Electric variables measurement; Flash memory; Flash memory cells; Mirrors; PROM; Pulp manufacturing; Split gate flash memory cells; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, Systems, and Applications, 1999. International Symposium on
Conference_Location
Taipei
ISSN
1524-766X
Print_ISBN
0-7803-5620-9
Type
conf
DOI
10.1109/VTSA.1999.786032
Filename
786032
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