Novel Bi-directional tunneling program/erase NOR (BiNOR) type flash EEPROM

Author

Yang, Evans Ching-Song ; Liu, Cheng-Jye ; Tien-Sheng Chao ; Liaw, Ming-Chi ; Hsu, Charles Ching-Hsiang

Author_Institution

Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan

fYear

1999

fDate

1999

Firstpage

207

Lastpage

210

Abstract

This paper presents a novel Bi-directional channel FN tunneling program/erase NOR (BiNOR) type flash memory cell for the reliable, high speed, and low power operation. With the localized shallow p-well at bit-line, BiNOR realizes low power channel FN tunneling program/erase in a NOR-type array architecture, which could only be done previously in a NAND array architecture. Furthermore, the read current is enhanced greatly by the 3-D conduction effect due to the designated shallow p-well

Keywords

MOS memory circuits; NOR circuits; PLD programming; flash memories; high-speed integrated circuits; integrated circuit reliability; low-power electronics; tunnelling; 3D conduction effect; BiNOR type; NOR type flash EEPROM; NOR-type array architecture; bi-directional tunneling program/erase; channel FN tunneling program/erase; low power operation; read current; Bidirectional control; Degradation; EPROM; Energy consumption; Flash memory; Flash memory cells; Hot carriers; Laboratories; Threshold voltage; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, Systems, and Applications, 1999. International Symposium on

Conference_Location

Taipei

ISSN

1524-766X

Print_ISBN

0-7803-5620-9

Type

conf

DOI

10.1109/VTSA.1999.786036

Filename

786036