DocumentCode
3067267
Title
Error floors of non-binary LDPC codes
Author
Nozaki, Takayuki ; Kasai, Kenta ; Sakaniwa, Kohichi
Author_Institution
Dept. of Commun. & Integrated Syst., Tokyo Inst. of Technol., Tokyo, Japan
fYear
2010
fDate
13-18 June 2010
Firstpage
729
Lastpage
733
Abstract
In this paper, we analyze (2, k)-regular non-binary low-density parity-check codes over the binary erasure channels. We propose a method to improve the error floors by optimizing labels in zigzag cycles in the Tanner graph. We analyze the error floors for codes designed by the proposed optimization method and show that the error floors are decreasing in the size of Galois field.
Keywords
optimisation; parity check codes; Galois field; Tanner graph; binary erasure channels; error floors; low-density parity-check codes; non-binary LDPC codes; optimization method; zigzag cycles; Belief propagation; Bipartite graph; Decoding; Design methodology; Error analysis; Galois fields; Hydrogen; Niobium; Optimization methods; Parity check codes;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Theory Proceedings (ISIT), 2010 IEEE International Symposium on
Conference_Location
Austin, TX
Print_ISBN
978-1-4244-7890-3
Electronic_ISBN
978-1-4244-7891-0
Type
conf
DOI
10.1109/ISIT.2010.5513602
Filename
5513602
Link To Document