DocumentCode
3067412
Title
Implementation of a high speed multiport register file in a 1.8 V, 0.25 μm CMOS bulk and SOI technology
Author
Joshi, R.V. ; Hwang, W. ; Wilson, S. ; Shahidi, G. ; Chuang, C.T.
Author_Institution
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fYear
1999
fDate
1999
Firstpage
274
Lastpage
277
Abstract
The experimental hardware results of a high speed 8-port, 32 word×64-bit register file in 1.8 V, 0.25 μm CMOS bulk and SOI silicon technology are presented. Such a register file is designed for bulk technology but is also remapped and fabricated in SOI technology without any body contacts. It is shown that the register file in SOI achieves more than 20% performance gain over the counterpart
Keywords
CMOS memory circuits; SIMOX; high-speed integrated circuits; integrated circuit design; multiport networks; 0.25 mum; 1.8 V; 660 MHz; CMOS SOI technology; CMOS bulk technology; SIMOX; VLIW computer architecture; hardware results; high speed multiport register file; performance gain; CMOS technology; Circuits; Hardware; Inverters; Rails; Registers; Signal generators; Silicon on insulator technology; Tellurium; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, Systems, and Applications, 1999. International Symposium on
Conference_Location
Taipei
ISSN
1524-766X
Print_ISBN
0-7803-5620-9
Type
conf
DOI
10.1109/VTSA.1999.786053
Filename
786053
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