DocumentCode
3068554
Title
The SP16 signal processor
Author
Ungerboeck, C. ; Maiwald, D. ; Kaeser, H.P. ; Chevillat, P.R.
Author_Institution
IBM Zurich Research Laboratory, Rüschlikon, Switzerland
Volume
9
fYear
1984
fDate
30742
Firstpage
664
Lastpage
667
Abstract
The SP16 processor executes typical signal-processing tasks efficiently by overlapping in each processor cycle four functions: instruction prefetching, data-memory access and transfer of one data word over a single data bus, ALU operation, and multiplication. Despite SP16 being a one-address machine with a single data bus, it can perform filter operations with a multiplication and ALU operation in every processor cycle.
Keywords
Arithmetic; Computer aided instruction; Decoding; Digital signal processing; Filters; Laboratories; Modeling; Read-write memory; Signal design; Signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '84.
Type
conf
DOI
10.1109/ICASSP.1984.1172281
Filename
1172281
Link To Document