Title :
Neurocomputer with binary memory matrices for pattern recognition tasks
Author :
Dyabin, M.I. ; Karpinski, N.G. ; Polovyanyuk, A.I. ; Red´ko, V.G. ; Urgant, O.V.
Author_Institution :
InTeSy Ltd., Moscow, Russia
Abstract :
Algorithms, principle of operation, hardware, and test experiments of a neurocomputer, based on a large random access memory and parallel arithmetical logical units, are described. This paper describes the developments of the neurocomputer with binary memory matrices, that are made in Zelenograd
Keywords :
learning (artificial intelligence); neural nets; parallel architectures; pattern recognition; random-access storage; binary memory matrices; large random access memory; neurocomputer; parallel arithmetical logical units; pattern recognition; Cybernetics; Hardware; Logic testing; Neural networks; Neurons; Pattern recognition; Random access memory; Read-write memory;
Conference_Titel :
Neuroinformatics and Neurocomputers, 1995., Second International Symposium on
Conference_Location :
Rostov on Don
Print_ISBN :
0-7803-2512-5
DOI :
10.1109/ISNINC.1995.480881
