DocumentCode
3070127
Title
Design and architectural issues for EDRAMs
Author
Prince, Betty
Author_Institution
Memory Strategies Int., Leander, TX, USA
fYear
2001
fDate
2001
Abstract
The article presents design strategies for embedded DRAMs, including factors effecting cost and timeliness. Topics covered include generic templates, adaptable templates, ASIC DRAMs, full custom DRAMs, stackable macros and dual use system components
Keywords
DRAM chips; application specific integrated circuits; embedded systems; integrated circuit design; ASIC DRAM; adaptable template; design architecture; dual-use system component; embedded DRAM; full-custom DRAM; generic template; stackable macro; Application specific integrated circuits; Control systems; Costs; Logic design; Production systems; Read-write memory; Time to market;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power/Low Voltage Mixed-Signal Circuits and Systems, 2001. (DCAS-01). Proceedings of the IEEE 2nd Dallas CAS Workshop on
Conference_Location
Plano, TX
Print_ISBN
0-7803-6624-7
Type
conf
DOI
10.1109/DCAS.2001.920979
Filename
920979
Link To Document